Zipzoomfly happened to have a really great deal going on Corsair’s Twin2X2048-6400C4 (only US$63, free shipping, CA sales tax only), so I thought I’d give it a shot and compare the 6400C4 version to what I already had (Corsair Twin2X2048-6400).
Interestingly, the 6400C4 pair would cause my P5N-E SLI to randomly lock up, especially during heavy memory I/O, but occasionally during BIOS initialisation. memtest86 couldn’t even reach Pass 1%; the machine would hard lock. Windows XP would usually boot, but the instant you did anything memory-intensive (such as run Orthos for stress testing), it’d lock up. It doesn’t take an expert to quickly determine that the issue was likely being caused by some awkward memory timings.
Past experiences with Corsair memory had shown me that Corsair often tinkered with the SPD timing profiles (more on that in a moment), and was also known for changing DRAM manufacturers without any indication that such had been done. Okay, that’s not entirely true: they do have “version” numbers on their DIMMs, but they’re not always accurate. Corsair uses either Micron, Infineon, or Promos DRAM chips — and in the case of Micron, they use either older Micron chips or what’s referred to as “Micron D9”, a newer revision chip that is known to handle overclocking better — but also cause compatibility issues with some boards. Wonderful.
I won’t go into details of what DIMM SPDs contain, or the very-likely-marketing-driven SPD extensions like EPP (a bastardised profile extension created by Corsair and nVidia), but if someone asks, I’ll provide one in a future post.
The 6400C4 pair contained three SPD profiles available:
|RAS to CAS||4||5||4|
There’s a few interesting things about this chart, but the important two are:
- Lack of CMD rate on the two JEDEC profiles.
- Explicit CMD rate of 2T (2 cycles) on the EPP extension profile.
When the P5N-E SLI BIOS starts, it’s kind enough to show you what the CMD rate is. With BIOS settings of “Auto” for all memory timings, the CMD rate being chosen on the 6400C4 was 1T. Yes, that’s right, 1T.
This seemed, well… wrong. :-) Some other individuals (see References below), including Corsair’s own “RAMGuy” (who is a pretty low-level/technical individual to begin with), recommended to owners of 6400C4 RAM to adjust memory voltages in the BIOS.
This is not the correct solution; voltage is not the problem, CMD rate is!
It boils down to the simple question: why is the P5N-E SLI picking a CMD rate of 1T when neither the JEDEC SPD profiles nor the EPP extension profile state to use 1T?
The solution: go into the BIOS (under Advanced, Chipset, Memory Timing Setting, Command Per Clock (CMD)) and change Auto to 2T.
And voila — memtest86 ran for an hour without a single error or lock-up, and Orthos ran for 2 hours without any problem. I’ll add that the P5N-E SLI in question is running BIOS revision 0703, which is the latest-and-greatest. Oh, and the ChangeLog for the 0703 revision also states that it adds “better memory compatibility”. I’m tempted to downgrade the BIOS just to see if the CMD rate is properly negotiated…
UPDATE: I’m now making use of the EPP profile (which explicitly states to use 2T). Since the 6400C4 is “nVidia SLI-ready” (marketing-schmooze for “has an EPP profile”), I went into the BIOS and set SLI-Ready Memory to CPUOC 0% (thus not overclocking the processor, but gaining use of the EPP profile settings on the RAM). I also put the CMD clock back to Auto. No go — the BIOS would pick a CMD timing of 1T. So the EPP profile has nothing to do with the problem. It’s got to be some weird SPD setting on the 6400C4 memory. Gee, thanks Corsair.
UPDATE: Almost a year later, people are still reporting this problem. I commented in a recent thread over at the Corsair Micro forums, and was able to get an explanation from RAMGuy. The problem appears to be some kind of incompatibility with a specific brand of DRAM and the P5N-E or P5N-E SLI. What DRAM manufacturer is used is entirely up to Corsair, and is very likely difficult to control. Full details are available in this post on their forum.